Method and apparatus for reducing cold joint defects in flip...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C257S737000, C257SE23069, C257SE21508

Reexamination Certificate

active

07396752

ABSTRACT:
An electronic device is disclosed with solder bumps treated to improve coplanarity and reduce the effects of poor solder bump surface quality, and a method of constructing same. An electronic device is placed against a flat plate and a controlled amount of force is applied to press together the electronic device and flat plate. The taller solder bumps are compressed, reducing non-coplanarity of the solder bumps. The controlled amount of force exposes the bulk material of a solder bump coated with a foreign material. A layer of abrasive, electroconductive particles that is harder than the foreign material, dispersed on the surface of the flat plate and firmly held in place, may also puncture the foreign material and expose the solder bump bulk material when the controlled amount of force is applied.

REFERENCES:
patent: 6088236 (2000-07-01), Tomura et al.
patent: 6267650 (2001-07-01), Hembree
patent: 6660944 (2003-12-01), Murata et al.
patent: 2002/0093108 (2002-07-01), Grigorov

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