Method and apparatus for reducing charge loss in a...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S593000, C438S582000, C438S258000, C257SE27103

Reexamination Certificate

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10872618

ABSTRACT:
A method of fabricating a non-volatile memory cell on a semiconductor substrate is disclosed. An area of a first region of the semiconductor substrate designated for a layer of floating polysilicon is blocked while a second region of the semiconductor substrate designated for a layer of non-floating polysilicon is exposed. Exposed regions of the semiconductor substrate are doped with charges.

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Rydberg, M., et al, “Long-Term Stability and Electrical Properties of Compensation Doped Poly-Si IC-Resistors”, IEEE Transaction on Electron Devices, vol. 47, No. 2, Feb. 2000, pp. 417-426.

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