Method and apparatus for redirecting void diffusion away...

Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold – In integrated circuit

Reexamination Certificate

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C257S334000, C257S396000

Reexamination Certificate

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11323400

ABSTRACT:
A method and apparatus for redirecting void diffusion away from vias in an integrated circuit design includes steps of forming an electrical conductor in a first electrically conductive layer of an integrated circuit design, forming a via between a distal end of the electrical conductor and a second electrically conductive layer of the integrated circuit design, and reducing tensile stress in the electrical conductor to divert void diffusion away from the via.

REFERENCES:
patent: 4826455 (1989-05-01), Case et al.
patent: 6537097 (2003-03-01), Szu
patent: 7142395 (2006-11-01), Swanson et al.
patent: 2005/0254175 (2005-11-01), Swanson et al.
T.C. Huang et al.; “Numerical Modeling and Characterization of the Stress Migration Behavior Upon Various 90 nanometer Cu/Low k Interconnects”; Jun. 2-4, 2003; 4 pages.
Derryl D. J. Allman et al.; “Method And Apparatus For Diverting Void Diffusion In Integrated Circuit Conductors”; Patent Application, 25 pages, Dec. 29, 2005.

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