Method and apparatus for reconfiguring thread scheduling...

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling

Reexamination Certificate

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Reexamination Certificate

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06918116

ABSTRACT:
A method and system for thread scheduling to run in parallel with a main processor, comprising: obtaining parameter values for a plurality of different threads; performing logic functions, in parallel with, but without interrupting the main processor, on said parameter values to determine if thread scheduling should be reconfigured, and if so, which thread should be enabled; and sending an interrupt signal to interrupt the main processor if thread scheduling is to be reconfigured. The parameters may be obtained by monitoring the values from thread processes held in registers with fixed addresses, or by snooping memory traffic for selected parameters. The logic functions, in a preferred embodiment, may be implemented using reconfigurable hardware logic.

REFERENCES:
patent: 5379428 (1995-01-01), Belo
patent: 5630128 (1997-05-01), Farrell et al.

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