Method and apparatus for real memory page handling for cache opt

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Details

711170, 711118, 711123, 711203, 711 3, G06F 1200

Patent

active

058095616

ABSTRACT:
An improved method and apparatus for managing real pages, also called physical pages, and virtual pages, also called logical pages, in a virtually indexed cache that is implemented as two physical caches. A list of free real pages that is a doubly linked list with a single anchor in addition to the free real pages is created. The pages are sequentially associated with each other using two sets of pointers. A set of forward pointers are used with the first pointer connecting the anchor page to the first physical page in the list and subsequent pointers connecting subsequent pages with each other with the last page having a pointer pointing to the anchor page. A set of backward pointers are employed with the first pointer pointing from the anchor to the last page in the list with subsequent pointers traversing the list towards the first page with the first page having the last pointer pointing to the anchor page. When a request for a real page is received to assign to a virtual page, an identification of whether the virtual page is an even or odd virtual page is made. The last real page in the list is assigned in response to a determination that the virtual page is an even virtual page. The first real page is assigned in response to a determination that the virtual page is an odd virtual page. In freeing real pages, an identification is made as to whether the page being freed is an even real or an odd real page. The page being freed is inserted at the beginning of the list in response to a determination that the real page is an odd real page. The page being freed is inserted at the end of the list in response to a determination that the page being freed is an even real page.

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