Method and apparatus for reading/writing data from/into semicond

Static information storage and retrieval – Read/write circuit – Simultaneous operations

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Details

36518902, 365207, 36523003, G11C 700, G11C 800

Patent

active

055965334

ABSTRACT:
A method and an apparatus for reading/writing data from/into a semiconductor memory device. In a read mode, a memory cell array block from which data is to be read is selected in response to a row address signal and a column of the selected memory cell array block is selected in response to a column address signal. Data are transferred from a memory cell of the selected column to a pair of bit lines of the selected column and then sense-amplified. A read signal is decoded and a pair of column decoding lines of the selected column become a desired logic state in accordance with the decoded result. A current path is formed between one of the column decoding lines and a ground terminal in response to the sense-amplified data on the bit lines. Data on the column decoding lines are selected and sense-amplified. The sense-amplified data are transferred externally. In a write mode, a memory cell array block into which data is to be written is selected in response to the row address signal and a column of the selected memory cell array block is selected in response to the column address signal. A pair of column decoding lines of the selected column become a desired logic state in response to a write signal. Data on one of the column decoding lines is transferred to a bit line sense amplifier connected to a memory cell of the selected column.

REFERENCES:
patent: 5479373 (1995-12-01), Takeuchi et al.
patent: 5497352 (1996-03-01), Magore
patent: 5553032 (1996-09-01), Taguchi
patent: 5555206 (1996-09-01), Uchida

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