Method and apparatus for read launch optimizations in memory...

Details Method and apparatus for read launch optimizations in memory... Method and apparatus for read launch optimizations in memory...

2005-09-06

2005-09-06

Vital, Pierre M. (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S100000, C710S020000, C710S021000

Reexamination Certificate

active

06941425

ABSTRACT:
A method and apparatus for the optimization of memory read operations via read launch optimizations in memory interconnect are disclosed. In one embodiment, a write request may be preempted by a read request.

REFERENCES:
patent: 5522059 (1996-05-01), Marushima et al.
patent: 5636364 (1997-06-01), Emma et al.
patent: 6047348 (2000-04-01), Lentz et al.
patent: 6076139 (2000-06-01), Welker et al.
patent: 6092158 (2000-07-01), Ajanovic et al.
patent: 6247084 (2001-06-01), Apostol, Jr. et al.
patent: 6266747 (2001-07-01), Dahl et al.
patent: 6285679 (2001-09-01), Carvey et al.
patent: 6295581 (2001-09-01), Deroo
patent: 6487626 (2002-11-01), Gray et al.
patent: 2001/0038634 (2001-11-01), Dally et al.
patent: 2002/0065924 (2002-05-01), Barrall et al.
patent: 0 477 406 (1992-04-01), None
Li-Shiuam Peh et al. “Flit-reservation flow control”, High-Performance Computer Architecture, 2000. HPCA—6. Proceedings, Sixth International Symposium on Touluse, France. Jan. 8-12, 2000, Los Alamitos, CA. IEEE Comput. Soc. US, pp. 73-84. XP010371892 ISBN 0-7695-0550-3.
Iyer R, Bhuyan Ln, Nanda A: Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors, CA Conference Article, May 5, 2000, XP002248955, Cancun Mexico.
Li-Shiuan Peh et al: “Flow Control and Micro-Architectural Mechanisms for Extending the Performance of Interconnection Networks; 17-36, 105-138” XP002248956, Stanford University, retrieved from www-cs-students.stanford.edu on Jul. 24, 2003.

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