Method and apparatus for randomized cache entry replacement

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S118000, C711S119000, C711S120000, C711S121000, C711S122000, C711S133000, C711S136000, C712S204000, C712S207000, C712S239000

Reexamination Certificate

active

06996678

ABSTRACT:
A cache controller is disclosed. The cache controller includes potential replacement list, a plurality of valid bits and a number of counters. The potential replacement list includes a number of entries. Each of the valid bits corresponds to one of the entries. Each of the counters also corresponds to the one of the entries.

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