Method and apparatus for quickly modifying cache state

Details Method and apparatus for quickly modifying cache state Method and apparatus for quickly modifying cache state

1996-06-24

1998-09-01

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711 3, 711118, 711123, 711135, 711145, 711146, G06F 9308, G06F 1100

Patent

active

058025740

ABSTRACT:
The state of cached data may be modified without performing a tag comparison. Each cache line includes at least one attribute bit and at least one state bit. A processor issues an instruction requesting modification of the state of all cache lines associated with an attribute specified by the instruction. Qualifying logic modifies the state of a cache line as a function of the attributes stored in the cache line and the attribute specified by the instruction.

REFERENCES:
patent: 4355355 (1982-10-01), Butwell
patent: 5321827 (1994-06-01), Lu et al.
patent: 5341508 (1994-08-01), Keely et al.
patent: 5355467 (1994-10-01), MacWilliams et al.
patent: 5375216 (1994-12-01), Moyer et al.
patent: 5448719 (1995-09-01), Schultz
patent: 5524234 (1996-06-01), Martinez et al.
patent: 5629950 (1997-05-01), Godiwala et al.
Applicant's admitted art(Figure 2), Dec. 28, 1993.

Affiliated with

Also associated with

Rating

Method and apparatus for quickly modifying cache state does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for quickly modifying cache state, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for quickly modifying cache state will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-284575