Method and apparatus for pseudo-aligned transfers of data to mem

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395885, 395412, 3642393, G06F 1300

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active

056806426

ABSTRACT:
A method and apparatus for pseudo aligned transfers to memory for processors, peripherals and memories. Alignment logic, typically coupled to a peripheral, receives a plurality of data bytes from a processor. The alignment logic uses a control header transferred with the data bytes to determine whether the data bytes require re-alignment. To effect re-alignment, the alignment logic combines, rotates, and masks the data bytes as indicated by the control header.

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"Software Interface for Non-Aligned Data Transfers", IBM Technical Disclosure Bulletin, vol. 35, No. 6, Nov. 1992.

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