Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2005-04-21
2009-12-29
Fan, Chieh M (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S375000, C375S374000, C375S327000
Reexamination Certificate
active
07639769
ABSTRACT:
A dual loop, clock synchronization circuit for a receiver in a communication system. The circuitry uses a first loop of a digital phase lock loop for coarse synchronization to time stamps within the received data and uses a second loop for fine synchronization of a second numerically controlled oscillator.
REFERENCES:
patent: 4802009 (1989-01-01), Hartmeier
patent: 6215835 (2001-04-01), Kyles
patent: 6445231 (2002-09-01), Baker et al.
patent: 6658065 (2003-12-01), Della Torre et al.
patent: 6801591 (2004-10-01), Frencken
patent: 7274239 (2007-09-01), Lin
patent: 2002/0075980 (2002-06-01), Tang et al.
patent: 2003/0206600 (2003-11-01), Vankka
patent: 2004/0000936 (2004-01-01), McCollum et al.
patent: 2004/0062278 (2004-04-01), Hadzic et al.
patent: 2004/0201428 (2004-10-01), Kenney et al.
patent: 2006/0062058 (2006-03-01), Lin
patent: 2007/0201541 (2007-08-01), Chuang et al.
patent: 0 658 975 (1995-06-01), None
patent: WO 03/043206 (2003-05-01), None
Lai Yhean-Sen
Malkemes Robert Conrad
Agere Systems Inc.
Fan Chieh M
Ghulamali Qutbuddin
Mendelsohn Steve
Mendelsohn, Drucker & Associates P.C.
LandOfFree
Method and apparatus for providing synchronization in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for providing synchronization in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for providing synchronization in a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4055666