Electrical computers and digital data processing systems: input/ – Intrasystem connection – Protocol
Reissue Patent
2005-10-21
2008-05-27
Myers, Paul R. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Protocol
C710S023000, C710S064000
Reissue Patent
active
RE040346
ABSTRACT:
A UART including a logic unit is disclosed, wherein the logic unit automatically enables or disables the UART receiver port whenever data is being processed by the UART for wireless transmission. More specifically, a logic unit is connected to a data store, to a transmit FIFO and to a UART processing unit as well as to an external CPU, wherein the logic unit analyzes the logic states of each of the signals from each of the specified connections to determine whether to enable or disable the receiver unit. An inventive method is also disclosed wherein the logic unit only enables the receiver when the data store is empty and the transmitter FIFO is empty and a receiver enable flag is set to true and a half duplex mode of operation has been specified by an external CPU. Otherwise, the logic enables the receiver only when a full duplex mode of operation has been specified and the receiver enable flag is set to a logic one.
REFERENCES:
patent: 3618025 (1971-11-01), Tomozawa
patent: 3715496 (1973-02-01), Jones, Jr.
patent: 4093981 (1978-06-01), McAllister et al.
patent: 4291198 (1981-09-01), Anderson et al.
patent: 4524461 (1985-06-01), Kostanty et al.
patent: 4597082 (1986-06-01), Hill et al.
patent: 4740957 (1988-04-01), Cassidy et al.
patent: 4744077 (1988-05-01), Fadem et al.
patent: 4817089 (1989-03-01), Paneth et al.
patent: 4868474 (1989-09-01), Lancraft et al.
patent: 4949333 (1990-08-01), Gulick et al.
patent: 5045675 (1991-09-01), Curry
patent: 5119319 (1992-06-01), Tanenbaum
patent: 5140679 (1992-08-01), Michael
patent: 5175766 (1992-12-01), Hamilton
patent: 5179661 (1993-01-01), Copeland, III et al.
patent: 5199105 (1993-03-01), Michael
patent: 5245553 (1993-09-01), Tanenbaum
patent: 5287458 (1994-02-01), Michael et al.
patent: 5349635 (1994-09-01), Scott
patent: 5509126 (1996-04-01), Oprescu et al.
patent: 5564061 (1996-10-01), Davies et al.
patent: 5732625 (1998-03-01), Klingler et al.
patent: 5751441 (1998-05-01), Morimoto
patent: 0 666 529 (1995-01-01), None
patent: WO 90/04296 (1990-04-01), None
Communications Chip Interfaces With Most Microprocessors by Sam Travis, National Semiconductor Corp., Santa Clara, California Electronics, Mar. 16, 1978.
INWAS: Interfacing With Asynchronous Serial Node by David G. Larsen, Peter R. Rony and Jonathan A. Titus, IEEE Transactions On Industrial Electronics and Control Instrumentation, vol., IECI-24, No. 1, Feb. 1977.
Communications Chip Interfaces With Most Microprocessors by Sam Travis, National Semiconductor Corp. Mar. 16, 1978.
INWAS: Interfacing With Asynchronous Serial Node by David G. Larson, Peter R. Roney and Jonathan A. Titus, IEEE Transactions On Industrial Electronics and Control Instructions, vol. IECI-24, No. 1 Feb. 1977.
Myers Paul R.
Telefonaktiebolaget LM Ericsson (publ)
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