Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-07-29
2010-11-23
Elmore, Stephen C (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S105000, C711S165000
Reexamination Certificate
active
07840757
ABSTRACT:
Computer systems with direct updating of cache (e.g., primary L1 cache) memories of a processor, such as a central processing unit (CPU) or graphics processing unit (GPU). Special addresses are reserved for high speed memory. Memory access requests involving these reserved addresses are routed directly to the high speed memory. Memory access requests not involving these reserved addresses are routed to memory external to the processor.
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Beukema Bruce L.
Hoover Russell D.
Kriegel Jon K.
Kuesel Jamie R.
Mejdrich Eric O.
Elmore Stephen C
International Business Machines - Corporation
Patterson & Sheridan LLP
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