Method and apparatus for providing fast interrupt response using

Electrical computers and digital data processing systems: input/ – Interrupt processing

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710 1, 710 5, 710 6, 710 20, 710 59, 369 32, 369 47, 369 48, 369 54, 369124, 360 32, G06F 946

Patent

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059319348

ABSTRACT:
A data processing device 100 uses a portion of a random access memory 111 as an input buffer for holding a portion of a stream of data which is received by an input interface 130. Likewise, a portion of a memory 121 is used as an output buffer for holding a portion of processed data which is output by an output interface 140. A processing unit 110 within the processing device manages the flow of input and output data. The input interface asserts an I/O request 860 when it receives a data word, and the output interface asserts an I/O request 870 when it needs a data word. In response to an I/O request, fast interrupt circuitry inserts a ghost instruction which is formed by doppelganger circuitry into an instruction sequence which is being accessed from a ROM 112. The ghost instruction performs the requested data transfer.

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