Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
1999-10-05
2004-01-06
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S052000, C710S056000, C711S100000
Reexamination Certificate
active
06675239
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of providing commands to a command memory and to the area of context switching.
Portions of the disclosure of this patent document contain material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure as it appears in the Patent and Trademark Office file or records, but otherwise reserves all copyright rights whatsoever. ArtX, and all ArtX-based trademarks and logos are trademarks or registered trademarks of ArtX, Inc. in the United States and other countries.
2. Background Art
Computers are often used to display graphical information. In some instances, graphical data or images are “rendered” by executing instructions from an application that is drawing the data or image to a display. An image is a regular two dimensional array in which every element of the array is a digital quantity of energy such as light/heat/density, etc. An image may also be viewed as a discretely sampled digital representation of an energy continuum with the same number of elements in each row. The image can also be procedurally generated dynamically at the time of display by the computer program or sampling device, for example. A displayed image may be made up of a plurality of graphical objects. Examples of graphical objects include points, lines, polygons, and three dimensional solid objects.
The generation of graphical display data is often accomplished by a graphics application providing commands for processing and display to a processor. In some cases, the graphics application is being executed on the same processor that is performing the drawing commands. In other cases, a separate graphics processor is used.
Consider the case where an application running on an application processor is generating commands to provide to a graphics processor for execution and ultimately, the display of graphical data. The application processor can send the commands one at a time to the graphics processor, with a new command being provided only when the application processor has been informed that the graphics processor has completed execution of the previously sent instruction. This is an inefficient system in that the graphics processor cannot operate at full speed. It is desired to have another instruction available to the graphics processor whenever it is ready for another instruction. (Note that for purposes of this invention, the terms “command” and “instruction” will be used interchangeably).
One prior art solution to providing commands to a graphics processor is to provide a buffer that stores a number of drawing commands for access and execution by the graphics processor. Referring to
FIG. 1
, a graphics application
101
executing on an application processor
102
provides commands to command memory
103
. Command memory
103
is accessed by graphics processor
104
which executes commands and provides display data to display
105
.
Command memory
103
consists of, for example, 256 lines where instructions can be stored. In this prior art scheme, application processor
102
writes 256 commands to command memory
103
. The graphics processor
104
is then notified that the command memory is full and begins executing commands. Periodically, the application processor polls the command memory to see if it is empty (that is, if all commands have been read by graphics processor
104
). When command memory
103
is empty, application processor
102
writes another 256 commands.
A disadvantage of the scheme of
FIG. 1
is that the polling of command memory
103
by application processor
102
is time consuming and wastes processor cycles. Another disadvantage is that the time needed by the graphics processor
104
to read and execute all the commands in command memory
103
is not constant. Therefore, the graphics processor may be waiting for instructions for some time before the application processor is informed to write more commands. As noted above, it is inefficient for the command processor to be waiting for commands.
Another prior art scheme in a PC environment consists of repeatedly writing commands to a single write address which then go into a FIFO that feed into a command interpreter. In such a scheme, the writing application is performed as an “uncached” operation. This scheme is inefficient in that it takes too many processor cycles to accomplish writes of commands.
Another disadvantage of prior art schemes occurs when more than one application is issuing drawing commands. One prior art solution is to only permit one application to issue drawing commands at a time. But this solution is not efficient and fails to take advantage of multitasking capable computer systems. Another prior art scheme is to implement a graphics driver instead of writing to a graphics processor. The driver then acts as a traffic controller and gatekeeper to the graphics processor. The driver can identify the application writing commands and can inhibit the processing of commands from another application until the first application's state has been saved and the new application's state has been applied. A disadvantage of the driver scheme is that it adds another layer of overhead and requires the commands to be first written to the driver and then again to the graphics processor. Also, the driver, because it must communicate with multiple applications, must be separate from any one application. It must be part of the operating system, so that the processor state is changed from application address space to operating system address space every time there is a change in applications writing to the driver.
SUMMARY OF THE INVENTION
The invention provides a method of providing commands to a command memory where a graphics processor will have commands available for execution as long as there are commands available. The command memory includes a first indicator to identify the command location most recently accessed by the graphics processor. A second indicator identifies the number of commands locations available to write commands based on the most recently accessed command location. Consider where a processor initially fills a command memory of, for example, 256 command locations. The application processor writes 256 commands to the command memory. After completing the writing of 256 commands, the application processor checks the location of the most recently accessed command location by the graphics processor. This is made available through a register on the graphics processor that stores the address of the most recently accessed command location. If the most recently accessed command location is, for example, the 10th command location, the application processor can write 10 commands to the command memory. It then checks again for the most recently accessed command location (as it does each time after writing the permissible amount of commands). Consider now that the most recently accessed command location is location
45
. The application processor can now write 35 commands (from the 10th location to the 45th location) before again determining the most recently accessed command memory location. As a result of the invention, the application processor only checks the availability of space to write commands after it has written enough commands to fill the command memory. On the graphics processor side, the command memory is never empty unless the graphics processor executes and consumes instructions faster than the instructions are written (an unlikely event).
In another embodiment of the invention, it is possible to identify which of a number of applications are writing commands to the command memory by having each application write to an associated address range. When commands are written to one of the address ranges, that range becomes a current context. A shadow memory is used for writes to address ranges other than the current context. When the context changes, commands from the shadow memory is swapped into the comma
Mace Robert
Van Hook Timothy
ATI Technologies Inc.
Coudert Brothers LLP
Harriman II, Esq. J. D.
Huynh Kim
Kim Harold
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