Method and apparatus for protecting page translations

Details Method and apparatus for protecting page translations Method and apparatus for protecting page translations

2005-05-03

2005-05-03

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S206000, C711S209000

Reexamination Certificate

active

06889308

ABSTRACT:
In one aspect of the present invention, an apparatus for converting a virtual address to a physical address is provided. The apparatus comprises a comparator, a first mechanism, and a second mechanism. The comparator is adapted to receive the virtual address and deliver a first signal indicating that the virtual address is outside a first preselected range, and a second signal indicating that the virtual address is within the first preselected range. The first mechanism is adapted to generate a first physical address from the virtual address in response to receiving the first signal, and the second mechanism is adapted to generate a second physical address from the virtual address in response to receiving the second signal.

REFERENCES:
patent: 4835734 (1989-05-01), Kodaira et al.
patent: 5029070 (1991-07-01), McCarthy et al.
patent: 5278962 (1994-01-01), Masuda et al.
patent: 5386579 (1995-01-01), Bourekas et al.
patent: 6574721 (2003-06-01), Christenson et al.

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