Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-12-02
2000-05-30
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711144, G06F 1208
Patent
active
060702311
ABSTRACT:
A method for processing memory requests and a memory controller that implements the method are disclosed. The method includes the steps of (a) receiving a first memory request from a first bus, (b) issuing a first coherency request on a second bus in order to process the first memory request, (c) storing the first coherency request in a storage area of the memory controller that is configured to receive memory requests from the second bus, and (d) processing the first coherency request from the storage area.
REFERENCES:
patent: 5504872 (1996-04-01), Galles et al.
patent: 5530933 (1996-06-01), Frink et al.
patent: 5544345 (1996-08-01), Carpenter et al.
patent: 5546546 (1996-08-01), Bell et al.
patent: 5590379 (1996-12-01), Hassler et al.
patent: 5737758 (1998-04-01), Merchant
patent: 5737759 (1998-04-01), Merchant
patent: 5796977 (1998-08-01), Sarangdhar et al.
patent: 5797026 (1998-08-01), Rhodehamel et al.
patent: 5848434 (1998-12-01), Young et al.
patent: 5905876 (1999-05-01), Pawlowski et al.
Chan Eddie P.
Encarnacion Yamir
Intel Corporation
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