Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-01-03
2006-01-03
Myers, Paul R. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S268000, C710S048000
Reexamination Certificate
active
06983339
ABSTRACT:
A method and apparatus for delivering APIC interrupts to a processor, and between processors, as FSB transactions. Interrupts and hardware signals, generated by a PCI device, are converted into an upstream memory write interrupt and further converted into an FSB interrupt transaction, received by a processor. Interrupts marked as lowest priority re-directable are redirected based on task priority information. Support for XTPR transactions to update XTPR registers is provided. Preferred ordering of XTPR update transactions and interrupts to be redirected is provided.
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Acharya Satish
Bogin Zohar
Garcia Serafin E.
Harriman David J.
Rabe Jeffrey L.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Myers Paul R.
Phan Raymond N
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