Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt inhibiting or masking
Patent
1997-08-15
1999-12-14
Sheikh, Ayaz R.
Electrical computers and digital data processing systems: input/
Interrupt processing
Interrupt inhibiting or masking
710261, 710 49, G06F 1314
Patent
active
060031093
ABSTRACT:
A method and apparatus for processing interrupts for a plurality of components connected to and sharing an interrupt line in a data processing system in which interrupts are level sensitive interrupts. The components are connected to the interrupt line by interrupt connections, such as a pin. An interrupt is detected when the interrupt line is in a first state, while an interrupt is absent when the interrupt line is in a second state. Other interrupts cannot be processed while the interrupt line is in a first state. In response to detecting one or more interrupts, the connection associated with the component, for which one or more interrupts are generated, is disabled until all of the interrupts are processed. Disabling the interrupt connection allows the interrupt line to return to the first state and for additional interrupts for other components connected to the interrupt line to be detected and processed.
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Interrupt Sharing for Personal Computer; IBM Technical Disclosure Bulletin; vol. 29, No. 6, Nov., 1986; pp. 2380-2381, New York, US.
Caldwell Barry Elton
Stephens Larry Leon
Bailey Wayne P.
LSI Logic Corporation
Phan Raymond N
Sheikh Ayaz R.
Yee Duke W.
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