Method and apparatus for processing interrupts at...

Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt prioritizing

Reexamination Certificate

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C710S260000, C710S262000, C710S305000

Reexamination Certificate

active

06928502

ABSTRACT:
A method and apparatus are described by which interrupts from a source may be processed at a dynamically selectable level of priority. A system that has at least two different interrupt request connections, and that responds to interrupts asserted on the different connections by processing interrupts at associated and corresponding different priority levels, is configured so that an interrupt asserted by a particular interrupt source is coupled to a particular one of the plurality of request connections that has been selected under software control. Selective coupling of interrupt source to interrupt request connection may be effected by providing a set of control bits associated with each particular interrupt source, the set consisting, for example, of one interrupt mask bit for each of the different selectable priorities. Control may optionally be provided to preclude simultaneous coupling of an interrupt source to incompatible interrupt request connections.

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patent: 6295573 (2001-09-01), Bailey et al.
patent: 6631394 (2003-10-01), Ronkka et al.
“Multiple invariant system design for fault-tolerant real-time applications” by Yen, I.L. (abstract only) Publication date: Feb. 1-2, 1996.
“Fast context switching by hierarchical task allocation and reconfigurable cache” by Tanaka, K. (abstract only) Publication Date: Jul. 17, 2003.

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