Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1999-09-30
2002-09-24
Tu, Christine T. (Department: 2133)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S799000
Reexamination Certificate
active
06457146
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to computer system signal processing and more particularly to a method and apparatus for processing errors in a computer system.
BACKGROUND OF THE INVENTION
No matter how thoroughly a computer system is designed, unintended events may occur in computer systems during actual operation. Errors can happen due to a flaw in the design of the computer system or because of some operational malfunction. A well designed system should be able to anticipate various types of errors that may occur. Several problems arise when refining these general principles to specific implementations. It is difficult to classify all the errors that may possibly occur. There is no standard capability to detect an error and capture information that may assist in evaluating the error, especially when a multitude of errors are detected. There are also no efficient ways for hardware to inform software of an error and the details surrounding the circumstances of the error.
Further, the design of a computer system includes mechanisms for detecting and responding to any errors that may occur during operation. After a computer system's hardware detects the presence of an error, the computer system's software is often notified of the occurrence of the error and instructed to take appropriate action. Software development on prototype chips while in laboratory testing is hampered if some errors cannot be induced to happen and the code developed to handle these errors cannot be tested. For example, there may be no capability to generate incoming packets that have an invalid command encoding. Therefore, it is desirable to provide an efficient technique to identify and capture errors that occur during computer system operation. It is also desirable to provide a capability to induce errors into a computer system in order to test error handling software.
SUMMARY OF THE INVENTION
From the foregoing, it may be appreciated that a need has arisen for a technique to identify errors and capture information about them and provide a capability to induce the occurrence of errors in a computer system. In accordance with the present invention, a method and apparatus for processing errors in a computer system is provided that substantially eliminates or reduces disadvantages and problems associated with conventional error processing techniques.
According to an embodiment of the present invention, there is provided an apparatus for processing errors in a computer system that includes a request module that can receive incoming packets. A processor module can identify a write operation specified by an incoming request packet. The processor module determines a register specified by the incoming request packet upon which to perform the operation. A registers module maintains registers within which the write operation is performed. The incoming request packet specifies instructions for how to inject an error into the computer system. The processor module performs a write operation by writing information from the incoming request packet into one of the header and data registers of the registers module. The processor module sets an error bit to trigger processing of the injected error.
In detecting errors, the request module receives a request packet and determines whether the request packet has an error. The request module transfers the request packet to the processor module for processing in response to a determination that there is no error in the request packet. Otherwise, the request module stores header and data information associated with the request packet in the header and data registers of the registers module in response to the request module identifying an error in the request packet. The request module sets an error bit in an error register of the registers module to indicate that an error has been identified in the request packet.
The present invention provides various technical advantages over conventional error processing techniques. For example, one technical advantage is to inject errors into a computer system to test the functionality of error handling software. Another technical advantage is to efficiently identify errors and capture information concerning identified errors. Yet another technical advantages is to effectively provide error identification, capture, and injection in a common environment. Other technical advantages may be readily apparent to those of skill in the art in view of the following figures, description, and claims.
REFERENCES:
patent: 5121342 (1992-06-01), Szymborski et al.
patent: 5414713 (1995-05-01), Waschura et al.
patent: 5465250 (1995-11-01), Brief
patent: 5654962 (1997-08-01), Rostoker et al.
patent: 6012148 (2000-01-01), Laberge et al.
“Data Switch Error Isolation and Reporting,”IBM Technical Disclosure Bulletin, XP 000067014, vol. 32, No. 4B, Sep. 1989, pp. 201 and 203.
“Space Switch Network Error-Reporting Reduction Circuit,”IBM Technical Disclosure Bulletin, XP 000107692, vol. 33, No. 6A, Nov. 1990, pp. 223 and 225.
PCT International Search Report in International Application No. PCT/US 00/25845, dated Jul. 16, 2001, 7 pages.
Keen John S.
Salleh Azmeer
Baker & Botts L.L.P.
Harris Cynthia
Silicon Graphics Inc.
Tu Christine T.
LandOfFree
Method and apparatus for processing errors in a computer system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for processing errors in a computer system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for processing errors in a computer system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2900400