Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2006-11-07
2006-11-07
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S164000
Reexamination Certificate
active
07133978
ABSTRACT:
Method and apparatus for processing data stored in a memory shared among a plurality of processors is described. In an example, a semaphore is provided that is associated with a first portion of the memory. Tasks are stored in the first portion of the memory, the tasks being respectively related to data segments stored in a second portion of the memory. A state of the semaphore is determined. Access among the plurality of processors to the first portion of the memory is controlled in response to the state of the semaphore. A task is executed to process a data segment of the data segments in response to a processor of the plurality of processors gaining access to the first portion of the memory.
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James-Roxby Philip B.
Ross Charles A.
Schumacher Paul R.
Brush Robert
Padmanabhan Mano
Walter Craig E
Webostad W. Eric
Xilinx , Inc.
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