Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-07-18
2006-07-18
Chace, Christian P. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S146000, C712S207000, C712S217000, C712S237000
Reexamination Certificate
active
07080209
ABSTRACT:
A processing core using a lock scoreboard mechanism is provided. The lock scoreboard is adapted to manage a load-lock instruction. The load-lock scoreboard includes a plurality of scoreboard entries representing different conditions that must be met before the load-lock instruction can be retired. During execution of the load-lock instruction retirement conditions are speculatively performed, and the scoreboard is updated and checked accordingly. If the scoreboard indicates that one or more retirement conditions are not met, the load-lock instruction is replayed. Otherwise, the load-lock instruction is permitted to retire. Scoreboard management functions routinely update scoreboard contents as retirement conditions are cleared. This enables rapid retirement of load-lock operations.
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Carmean Doug
Hum Herbert H.
Chace Christian P.
Intel Corporation
Kenyon & Kenyon LLP
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