Method and apparatus for processing a circuit description...

Details Method and apparatus for processing a circuit description... Method and apparatus for processing a circuit description...

2007-03-13

2007-03-13

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

11238432

ABSTRACT:
Method and apparatus for processing a circuit description including a hierarchy of components for logic simulation is described. Each component is described using one of a first hardware description language (HDL) and a second HDL. A root component and each component in the hierarchy below the root component described using an HDL identical to that of the root component is elaborated up to a cross-language boundary. The root component is described using one of the first HDL or the second HDL and each component at the cross-language boundary is described using the other of the first HDL or the second HDL. Each component at the cross-language boundary is stored in one of a first vector associated with the first HDL or a second vector associated with the second HDL based on language. A connection is established between each component at the cross-language boundary and a respective parent component.

REFERENCES:
patent: 6080204 (2000-06-01), Mendel
patent: 6505328 (2003-01-01), Van Ginneken et al.
patent: 6574787 (2003-06-01), Anderson
patent: 6996793 (2006-02-01), Kronmiller et al.
patent: 7117473 (2006-10-01), Knol et al.
patent: 7120892 (2006-10-01), Knol et al.
patent: 2002/0133784 (2002-09-01), Gupta et al.

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