Method and apparatus for prioritizing interrupts in a...

Electrical computers and digital data processing systems: input/ – Interrupt processing – Interrupt prioritizing

Reexamination Certificate

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Details

C710S263000, C710S260000

Reexamination Certificate

active

06553443

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to monitoring the status of channels in a communications system, and, more particularly, to a method and apparatus for generating and prioritizing interrupts based on changes in the status of the communications channels.
2. Description of the Related Art
Telecommunications systems often use a centralized switching office as a common point for connection to multiple subscribers. Often multiple subscriber lines are supported by shared equipment. The degree of sharing depends, in part, on the demands placed on the equipment by the individual and collective subscriber lines.
In a typical installation, multiple subscriber lines are coupled to a shared line card. The line card includes circuitry for monitoring the status of the subscriber line by determining if the line is in use (e.g., off-hook), the type of signals being transmitted (e.g., modem, voice), the presence of touch tone signals, otherwise known as dual-tone multifrequency (DTMF) signals, etc. The line card may also include circuitry for detecting electrical problems, such as faults or transients, on the subscriber line.
A plurality of line cards are typically associated with a single shared processing resource, such as a microprocessor. Resources of the microprocessor are allocated to the line cards to determine changes in the status and to respond to such changes. Each line card usually includes one or more status registers indicating its particular condition. The shared microprocessor continuously polls the status registers of each line card to identify changes thereto. Such continuous polling consumes processing resources of the microprocessor, thereby limiting the number of line cards supportable by the microprocessor.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
One aspect of the present invention is seen in a communications system including a communications channel, a first processing unit; and interface unit, and an interrupt controller. The first processing unit is adapted to monitor the communications channel and provide a plurality of status bits. The interface unit includes an interrupt register. The interrupt controller is adapted to identify a plurality of interrupts in response to changes in the status bits. Each interrupt has a priority, and the interrupt controller is adapted to store selected interrupts in the interrupt register in an order determined by the priority of the interrupts.
Another aspect of the invention is seen in a method including monitoring a communications channel. A plurality of status bits associated with the monitoring are provided. A plurality of interrupts are identified based on changes in the status bits, each interrupt having a priority. Selected interrupts are stored in an interrupt queue in an order determined by the priority of the interrupts.


REFERENCES:
patent: 4156796 (1979-05-01), O'Neal et al.
patent: 4277648 (1981-07-01), Glassman
patent: 4481574 (1984-11-01), DeFino et al.
patent: 4513175 (1985-04-01), Smith
patent: 4878240 (1989-10-01), Lin et al.
patent: 5381552 (1995-01-01), Dahlberg et al.
patent: 5564060 (1996-10-01), Mahalingaiah et al.
patent: 5764996 (1998-06-01), Armstrong et al.
patent: 6081867 (2000-06-01), Cox
patent: 6185652 (2001-02-01), Shek et al.
patent: 6279064 (2001-08-01), Bronson et al.
patent: 6298410 (2001-10-01), Jayakumar et al.
patent: 0657806 (1994-06-01), None
patent: 0730230 (1996-09-01), None
“Hardware Managed Interrupt Status Queue and Manual Vector Generator for Multiple Channel Communications Controller,” Sep. 1991, IBM Technical Disclosure Bulletin, vol. 34, No. 4B, pp. 131-137.*
AMD, Inc., “Am79Q02/021/031 Quad Subscriber Line Audio-Processing Circuit (QSLAC™) Devices,” pp. 1-64, Feb., 1996.

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