Method and apparatus for preventing P1 punchthrough

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257316, H01L 3978

Patent

active

060668733

ABSTRACT:
A method and apparatus for an integrated circuit on a semiconductor substrate having good metal contact points. A first polysilicon layer is formed onto the substrate, and is etched to provide contact regions to the substrate. An ONO layer is formed onto the first polysilicon layer. A second polysilicon layer is formed onto the ONO layer, and a metal silicide layer is formed onto the second polysilicon layer. The second polysilicon layer and the metal silicide layer are etched at particular locations in order to form contact regions to the first polysilicon layer and to the substrate. A selective layer is formed onto the second polysilicon layer, the selective layer being etch selective with respect to the first polysilicon layer. An interlayer dielectric is formed onto the selective layer. A first etching is performed to provide a contact path through the interlayer dielectric, and then a second etching is performed to provide a contact path through the selective layer. Based on these two contact paths, a contact point can be provided externally to the first polysilicon layer.

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