Method and apparatus for preventing overerasure in a flash cell

Details Method and apparatus for preventing overerasure in a flash cell Method and apparatus for preventing overerasure in a flash cell

1991-11-06

1993-06-15

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Erase

365185, G11C 1140

Patent

active

052205339

ABSTRACT:
A method and apparatus for erasing Flash EPROM cells that avoids overerasure is provided. A high-impedance device is placed between the drain of the cell and the high-voltage supply used to erase the cell. As soon as the cell enters the onset of depletion and begins to conduct, most of the high voltage is dropped across the high-impedance device, leaving insufficient potential across the cell for Fowler-Nordheim tunneling to continue. The erase process is thus self-limiting. The process can be used on a chain or array of EPROM cells, with erasure stopping when any one of the cells conducts. Bias differences between erase and read modes assure that the cell that first goes into depletion is not in depletion in normal operation.

REFERENCES:
patent: 4903236 (1990-02-01), Nakayama et al.
patent: 4996571 (1991-02-01), Kume et al.
patent: 5097444 (1992-03-01), Fong
patent: 5122985 (1992-06-01), Santin
patent: 5132935 (1992-06-01), Ashmore, Jr.
Lai, S., IEDM Short Course on Non-Volatile Memories, Flash Memories, San Francisco, Calif., Dec. 9, 1990.

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