Method and apparatus for preventing chip breakage during semicon

Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor

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438 15, 438462, 438973, 148DIG162, G01N 3126

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active

058888381

ABSTRACT:
A method is described by which the mechanical strength of chips of semiconductor devices can be controlled by appropriate wafer finishing and sorted by knowledge of the finishing method and chip and wafer geometry. The control and sorting derive from a knowledge of the geometry of the striations remaining on the back of chips after the wafer-grinding finishing step.

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patent: 4968628 (1990-11-01), Delgado et al.
patent: 5162241 (1992-11-01), Mori et al.
patent: 5506672 (1996-04-01), Moslehi
patent: 5546797 (1996-08-01), Dutta et al.
Tummala et al., Microelectronics Packaging Handbook-Semiconductor Packing-Part II, Second Edition,, pp. 513-515 , 1997.

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