Method and apparatus for preventing a microprocessor from...

Details Method and apparatus for preventing a microprocessor from... Method and apparatus for preventing a microprocessor from...

2006-05-09

2006-05-09

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Digital data processing system initialization or configuration

C713S002000

Reexamination Certificate

active

07043628

ABSTRACT:
A microprocessor includes a counter having a counting input and a reset input. The counting input is coupled to a first terminal of the microprocessor for the selection of an operating mode thereof by application of a predetermined number of pulses to the first terminal. The reset input of the counter is driven by a control signal present on a second terminal of the microprocessor. The control signal is maintained by default at a first logic value ensuring the maintaining at zero of the counter during the initialization period by a circuit internal or external the microprocessor. Immunity against electromagnetic perturbations causing the microprocessor to enter into the test mode is provided.

REFERENCES:
patent: 5103167 (1992-04-01), Okano et al.
patent: 6408415 (2002-06-01), Kim
patent: 6526536 (2003-02-01), Chen et al.
patent: 6605956 (2003-08-01), Farnworth et al.
patent: 19855182 (1999-11-01), None

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