Method and apparatus for preemptive cache write-back

Details Method and apparatus for preemptive cache write-back Method and apparatus for preemptive cache write-back

1997-12-19

2000-10-17

Yoo, Do Hyun

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711141, 711142, 711144, 711145, 711146, G06F 1206

Patent

active

061346349

ABSTRACT:
A microprocessor preemptively write-backs dirty entries of an internal cache. Each cache entry is checked once each predetermined time period to determine if the cache entry is dirty. If dirty, a write history is checked to determine if the cache entry is stale. If stale, the cache entry in preemptively written back to main memory and then marked as clean. The write history includes a count of the number of consecutive predetermined time periods during which there is no write to the cache entry. The cache entry is stale if the count exceeds a predetermined number. For each check of the write history the nonwrite count is incremented if the cache entry has been written to during the prior cycle and decremented if not. Alternatively, the nonwrite count is set to zero if the cache entry has been written to. The dirty cache entry may be marked as clean upon copying to the write-back buffer or, alternatively, when the write-back buffer writes the dirty cache entry to the main memory. If a write address matches the address of any write-back buffer entry, the matching entry is flushed from the write-back buffer.

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