Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-06-06
2004-01-27
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S160000
Reexamination Certificate
active
06684288
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field
This invention relates to flash memory, more particularly to NOR flash memory with at least one block dedicated to storing erase and write times.
2. Background
Several different memory options exist today for system designers. The selection typically revolves around the desired characteristics of the memory, such as volatility, programmability and density. Volatile memory cannot retain its contents unless it has constant power. For this reason, some applications require non-volatile memory, such as read-only memory (ROM).
Some applications capitalize on the fact that typical ROMs have only limited programmability. Examples of ROM memory include electrically programmed ROM (EPROM) which can only be erased with ultraviolet light, or electrically erasable programmable ROM (EEPROM), which is byte-erasable. For original equipment manufacturers that do not want consumers to be able to erase these memories, but want the ability to upgrade it, these types of memories are ideal.
Both ROM and RAM are high density, being able to store high amounts of data in relatively small space. However, both typically consume lots of power. A solution for low-power, high-density, easily programmable non-volatile memory is flash memory. Flash memory is ideal for portable devices that require some type of storage.
Two different architectures of flash memory are the more prevalent options on the market today, one based upon the use of NOR gates (NOR flash), the other on NAND gates (NAND flash). Each has advantages and disadvantages.
For example, NOR flash is more suitable for program storage. Unfortunately, NOR flash takes longer to write, because the existing data must first be erased and then the new data written. The perception seems to be that the erase and write times given on NOR flash data sheets are too slow for data storage. However, these parameters are based upon a high number of cycles, which has degraded performance for erasures and writes. It is believed that data storage applications would write to flash fewer times, allowing for performance faster than the data sheet applications.
It is believed that if the user could track the progress, the faster progress would be noted and greater acceptance of NOR flash would result. Therefore, a need exists for a method and apparatus capable of tracking the erase and write times for NOR flash memory.
REFERENCES:
patent: 6125424 (2000-09-01), Komatsu et al.
Anderson Matthew D.
Intel Corporation
Kim Matthew
Marger Johnson & McCollom PC
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