Method and apparatus for prediction for fork and join...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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Reexamination Certificate

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10731567

ABSTRACT:
A method and apparatus for enabling the speculative forking of a speculative thread is disclosed. In one embodiment, a speculative fork instruction is conditioned by the results of a fork predictor. The fork predictor may issue predictions as to whether or not a speculative thread would execute desirably. The fork predictor may be implemented as a modified branch predictor circuit, and may have execution history updates entered by a determination of whether or not the execution of a speculative thread was or would have been desirable.

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patent: 6052769 (2000-04-01), Huff et al.
patent: 6466226 (2002-10-01), Watson et al.
patent: 6574725 (2003-06-01), Kranich et al.
patent: 6684398 (2004-01-01), Chaudhry et al.
patent: 6687812 (2004-02-01), Shimada
Intel Corporation, “Intel® Itanium® Architecture Software Developer's Manual—vol. 3: Instruction Set Reference”, Revision 2.1, Document No. 245319-004, pp. 16-29, Oct. 2002.

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