Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-03-08
2005-03-08
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S121000, C711S146000, C717S158000, C712S240000
Reexamination Certificate
active
06865649
ABSTRACT:
A system and method for pre-fetching data. A computer program comprising multiple basic blocks is submitted to a processor for execution. Tables or other data structures are associated with some or all of the basic blocks (e.g., a table is associated with, or stores, an instruction address of a particular basic block). During execution of a basic block, memory locations of data elements accessed during the executions are stored in the associated table. After a threshold number of executions, differences between memory locations of the data elements in successive executions are then computed. The differences are applied to the last stored memory locations to generate estimates of the locations for the data elements for a subsequent execution. Using the estimated locations, the data elements can be pre-fetched before, or as, the basic block is executed.
REFERENCES:
patent: 5212794 (1993-05-01), Pettis et al.
patent: 5623608 (1997-04-01), Ng
patent: 5950009 (1999-09-01), Bortnikov et al.
Ho Thang H
Padmanabhan Mano
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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