Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
1998-10-30
2002-07-02
Myers, Paul R. (Department: 2181)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C702S132000
Reexamination Certificate
active
06415388
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to computer systems architecture, and, more particularly, to a method and apparatus for power throttling in a microprocessor system using a closed loop feedback system.
DESCRIPTION OF THE RELATED ART
The clock speed of microprocessors has increased dramatically over the past several years. In the early eighties, microprocessors had clock speeds typically ranging from 5 to 16 MHz, which was sufficient to handle computer applications during that time period. However, as computer applications became more complex over the years to meet the demands of the computer user, the sluggish processor speeds of the past did not suffice. Today, microprocessors have clock speeds far exceeding those of the past, running at more than 300 MHz. And, these clock speeds show no sign of reaching a pinnacle. The microprocessors of the not-too-distant future have projected clock speeds that will significantly dwarf today's clock speed standards. With these higher clock speeds, microprocessors are capable of handling more and more complex computer applications in shorter periods of time, thus providing inherent benefits to the computer user.
Although the dramatic increase in the microprocessor's clock speed over the years has enabled the computer user to run more complex computer applications at faster speeds, it has posed problems for the computer systems designer. Such a significant increase in clock speed causes a substantial increase in the power consumed by the microprocessor, thus requiring the need for larger and more powerful power supplies. As the peak power of the microprocessor has increased to meet this demand for increased clock speed, the spread between the peak power and the average power that is typically consumed by the microprocessor has significantly increased as well.
Generally, a computer system is designed to account for the peak power consumed by the computer using higher delivery power supplies and adequate cooling devices to dissipate the peak power, even though this peak power consumption is seldom realized. This “overdesign” places unnecessary guard bands in the power and thermal design of the computer, thus increasing its cost and placing various limitations on the computer user. That is, a larger power supply adds weight and increases the size of the computer, which is particularly disadvantageous to the user of a portable computer, for example.
One method used to control the power consumption of a microprocessor is to adjust the effective frequency (i.e., clock speed) of the microprocessor to reduce the power. Since power is a linear function of the clock speed, the power reduces linearly with a decrease in the clock speed.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method for power throttling in a microprocessor having a voltage source and a clock applied thereto is provided. The method includes monitoring the short term power consumption of the microprocessor, comparing the power consumption to a predetermined value, and varying the clock speed and the supply voltage of the microprocessor in response to the comparison. In an alternative embodiment, the temperature of the microprocessor is the measured variable, rather than the short term power consumption. In such an embodiment, the measured temperature is compared to a predetermined value, and in response thereto, the clock speed and supply voltage are varied.
In another aspect of the invention, a power throttling device includes a microprocessor, a voltage source to supply voltage to the microprocessor, a clock source to operate the microprocessor at a desired frequency, and a power monitor configured to measure the short term power consumption of the microprocessor. Control logic is coupled to the voltage source and the clock source. The control logic is adapted to receive an indication of the power consumption from the power monitor and compare the power consumption to a predetermined value, and in response to the comparison, vary the supply voltage and the frequency. In an alternative embodiment, a temperature sensor is provided in place of the power monitor to measure the temperature of the microprocessor. The control logic receives an indication of the measured temperature from the temperature sensor and compares it to a predetermined value. In response to the comparison, the control logic varies the supply voltage and the frequency.
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Borkar Shekhar Y.
Browning Chris S.
Dermer Gregory E.
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