Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
2000-07-07
2003-05-06
Phasge, Arun S. (Department: 1741)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C204S227000
Reexamination Certificate
active
06558518
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method and an apparatus for plating a substrate. More particularly, it relates to a method and an apparatus for plating a substrate such as a semiconductor wafer to fill a metal such as copper (Cu) or the like in interconnection grooves defined in the substrate.
2. Description of the Related Art
In recent years, there has been a growing tendency to use copper, which has low electric resistivity and high electromigration resistance, instead of aluminum or aluminum alloy, as a metal material for forming interconnection circuits on semiconductor substrates. Copper interconnections are generally formed by filling copper in minute grooves or recesses defined in the surface of a semiconductor substrate. Specifically, copper interconnections are formed by depositing a film of copper over the entire surface of the semiconductor substrate according to CVD, sputtering, or plating, and then removing unwanted copper from the surface according to a chemical mechanical polishing (CMP) process, leaving copper in the grooves or recesses.
FIGS. 28A through 28C
of the accompanying drawings show successive steps of manufacturing a substrate W with copper interconnections. As shown in
FIG. 28A
, an oxide film
2
of SiO
2
is deposited on a conductive layer
1
a
on a semiconductor substrate
1
on which semiconductor devices are formed. Then, a contact hole
3
and an interconnection groove
4
are formed in the oxide film
2
by lithography and etching. Thereafter, a barrier layer
5
of TiN or the like and a seed layer
7
as a layer for supplying an electric current for electroplating are successively formed on the surface formed so far.
Then, as shown in
FIG. 28B
, the entire surface of the substrate W is plated with copper to deposit a copper layer
6
on the entire surface, filling the contact hole
3
and the groove
4
with copper. Thereafter, the copper layer
6
over the oxide film
2
is removed by CMP, making the copper layer
6
in the contact hole
3
and the groove
4
lie flush with the oxide film
2
. In this manner, an interconnection made of the copper layer
6
is produced as shown in FIG.
28
C.
FIG. 29
of the accompanying drawings shows a conventional general arrangement of a cup type apparatus of the face-down type. The cup type plating apparatus has a cylindrical plating chamber
12
which is open upwardly and holds a plating solution
10
therein, and a substrate holder
14
for removably holding a substrate W such as a semiconductor wafer downwardly and positioning the substrate W in a position close to the upper open end of the plating chamber
12
. The plating chamber
12
houses therein a planar anode plate
16
immersed approximately horizontally in the plating solution
10
. The substrate W serves as a cathode. The anode plate
16
is made of a porous material or a mesh material.
A plating solution ejector pipe
18
for producing an upward jet of plating solution is connected centrally to the bottom of the plating chamber
12
. The plating chamber
12
is surrounded by a plating solution reservoir
20
positioned around an upper portion of the plating chamber
12
. The plating solution ejector pipe
18
is connected to a plating solution supply pipe
28
that extends from a plating solution storage tank
22
and has a pump
24
and a filter
26
. The plating solution storage tank
22
is connected to a plating solution return pipe
30
extending from the plating solution reservoir
20
.
The substrate W is held above the plating chamber
12
by the substrate holder
14
. The surface to be plated of the substrate W faces downwardly. While a predetermined voltage is being applied between the anode plate
16
and the substrate W, the plating solution
10
in the plating solution storage tank
22
is ejected upwardly from the bottom of the plating chamber
12
by the pump
24
and applied perpendicularly to the surface to be plated of the substrate W. In this manner, a plating current flows between the anode plate
16
and the substrate W, forming a plated film on the lower surface of the substrate W. At this time, an overflow of the plating solution
10
from the plating chamber
12
is retrieved by the plating solution reservoir
20
, and flows therefrom into the plating solution storage tank
22
via the plating solution return pipe
30
.
In the conventional cup type plating apparatus, the jet of plating solution flows upwardly through pores or mesh of the anode plate
16
toward the lower surface of the substrate W. If the anode plate
16
comprises a soluble electrode, then peeled fragments of a black film attached to the surface of the anode plate
16
are carried by the plating solution to the lower surface of the substrate W. Those fragments of the black film tend to lower the quality of the plated film. In addition, the plating solution is liable to come into contact with cathode pins which supply an electric power to the substrate W, precipitating the plating metal. When the substrate W is subsequently removed, the plated layer near the cathode pins may possibly be damaged.
For electroplating the surface of a substrate with copper, since copper is likely to be diffused into silicon, a barrier layer of TiN, TaN, or the like is deposited on the surface of the substrate, and a thin copper seed layer deposited on the barrier layer is used as a cathode. However, because no barrier layer is formed on the back and edge of the substrate, it is necessary to prevent the plating solution containing copper from being attached to the back and edge of the substrate. In immersion plating, therefore, the substrate is held by a substrate holder, and the outer peripheral edge of the surface of the substrate is sealed by a seal member so as to prevent the outer peripheral edge and back of the substrate from being wetted by the plating solution. Cathode pins are held in contact with the surface of the substrate in a space which is defined by the substrate holder, the substrate, and the seal member and which is held out of contact with the plating solution.
If the above substrate holder is applied to the jet plating process, then since the periphery of the substrate holder projects downwardly from the lower surface of the substrate, an air layer is created below the surface of the substrate simply when the substrate held by the substrate holder is brought into contact with the plating solution. Therefore, a good plated film cannot be formed on the surface of the substrate.
As shown in
FIG. 30A
of the accompanying drawings, the barrier layer
5
is formed so as to extend from the surface of a substrate W to an edge E thereof in view of the substrate area utilization efficiency, and the copper seed layer
7
is formed on the surface of the barrier layer
5
. If the copper seed layer
7
is deposited to a thickness of 100 nm, for example, by sputtering on the entire surface of the substrate W, then not only a thin copper seed layer is formed on the surface of the substrate W, but also a thin copper seed layer is formed on the edge E of the substrate W, as shown in
FIG. 30B
of the accompanying drawings. A copper layer
6
is formed on only the surface of the substrate W by sealing the outer peripheral edge of the surface of the substrate W so as not to apply the plating solution to the back of the substrate W, as shown in
FIGS. 30A and 30B
. Consequently, the thin copper seed layer remains deposited on the edge E and an area near the edge E. The remaining thin copper seed layer tends to be peeled off while the substrate W is being transported or subsequently treated after it has been plated or polished by the CMP process, resulting in cross contamination with copper.
When a plated copper film produced by copper sulfate electroplating is left to stand at room temperature, the plated copper film is annealed, and its resistivity is lowered. The gradient of the resistivity differs depending on the plating conditions, the chemical compositions, and the substrate conditions. The resistivity of
Hongo Akihisa
Kumekawa Masayuki
Ogure Naoaki
Sasabe Kenichi
Sendai Satoshi
Ebara Corporation
Phasge Arun S,.
Wenderoth , Lind & Ponack, L.L.P.
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