Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-08-16
2005-08-16
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06931614
ABSTRACT:
A system is provided that facilitates placing repeating flip-flop stations on signal lines within an integrated circuit. The system operates by first receiving a layout that includes multiple functional blocks, and a netlist that specifies interconnections for signals between these functional blocks. The system determines a transit time for a signal interconnecting the functional blocks. If this transit time exceeds an allowed time, the system divides the interconnection into two or more sections, wherein the transit times on the sections are each less than the allowed time. The system then places a repeating flip-flop station within a channel on the integrated circuit in a position that allows the transit time on these sections to be met. Next, the system routes the signal from the originating functional block through a flip-flop located at the repeating flip-flop station to a receiver at the destination functional block.
REFERENCES:
patent: 5397749 (1995-03-01), Igarashi
patent: 6209121 (2001-03-01), Goto
patent: 6725438 (2004-04-01), van Ginneken
patent: 6763506 (2004-07-01), Betz et al.
patent: 2004/0153984 (2004-08-01), Akkiraju
Hsu Jiun-Cheng
Jung Dae Suk
Grundler Edward J.
Park Vaughan & Fleming LLP
Siek Vuthe
Sun Microsystems Inc.
Tat Binh
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