Method and apparatus for placement of vias

Details Method and apparatus for placement of vias Method and apparatus for placement of vias

2005-12-20

2005-12-20

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06978433

ABSTRACT:
Method and apparatus for placement of vias is described. More particularly, source power and ground vias are placed in partial response to locations where conductive lines cross over a reserved region. The reserved region is reserved for an embedded device, and is reserved in a layout database of a host device.

REFERENCES:
patent: 5847968 (1998-12-01), Miura et al.

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