Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-12-08
2008-12-09
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07464354
ABSTRACT:
An apparatus for performing temporal checking is disclosed. A signal logger for performing temporal checking includes a group of edge detection modules and a group of counting modules. During testing, the signal logger is coupled to a device under testing (DUT). Each of the edge detection modules is capable of maintaining edge information after a state transition on a signal within the DUT has been detected. Each of the counting modules is associated with one of the edge detection modules. Each of the countering modules is capable of maintaining a clock cycle count information associated with a detected edge. After the testing has been completed, temporal checking information on a signal within the DUT can be obtained by reconstructing the edge information and the associated clock cycle count information of the signal collected during the test.
REFERENCES:
patent: 5953519 (1999-09-01), Fura
patent: 6324496 (2001-11-01), Alur et al.
patent: 6499132 (2002-12-01), Morley et al.
patent: 6985840 (2006-01-01), Hsu et al.
patent: 2004/0123254 (2004-06-01), Geist et al.
“Specman Elite—Testbench Automation,” http://verisity.com/products/specman.html.
H.-W. Anderson et al., “Configurable system simulation model build comprising packaging design data,” IBM J. Res. & Dev., vol. 48, No. 3/4, May/Jul. 2004.
Birmiwal Parag
Chadha Sundeep
Gloekler Tilman
Koesters Johannes
Chiang Jack
Dillon & Yudell LLP
Dimyan Magid Y
International Business Machines - Corporation
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