Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
Reexamination Certificate
2006-06-13
2006-06-13
Treat, William M. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Instruction modification based on condition
C216S036000, C216S036000
Reexamination Certificate
active
07062639
ABSTRACT:
In one method, a predicted predicate value for a predicate is determined. A predicated instruction is then conditionally executed depending on the predicted predicate value.
REFERENCES:
patent: 4578750 (1986-03-01), Amdahl et al.
patent: 4967351 (1990-10-01), Zmyslowski et al.
patent: 4999800 (1991-03-01), Birger
patent: 5471593 (1995-11-01), Branigin
patent: 5627981 (1997-05-01), Adler et al.
patent: 5923863 (1999-07-01), Adler et al.
patent: 6021487 (2000-02-01), Maliszewski
patent: 0605876 (1994-07-01), None
patent: 0 855 645 (1998-07-01), None
patent: WO 97/48042 (1997-12-01), None
patent: WO 98/08160 (1998-02-01), None
patent: WO 99/14667 (1999-03-01), None
August et al., “Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results”, Third International Symposium on High-Performance Computer Architecture, IEEE, Feb. 1-5, 1997, pp. 84-93.
Dulong, et al., “An Overview of the Intel® IA-64 Compiler”, Intel Technology Journal Q4, 1999, pp. 1-15.
Intel ® Itanium ™ Architecture Software Developer's Manual, Part II: Optimization Guide for the Intel® Itanium™ Architecture, Predication, Control Flow, and Instruction Stream, vol. 1: Application Architecture, Revision 2.0, Dec. 2001, pp. 1:129, 1:155-1:163.
Intel ® Itanium ™ Processor, Product Highlights, Copyright © 2001, Intel Corporation.
Tom R. Halfhill, “Beyond Pentium II”, BYTE.com, Dec. 1997, pp. 1-10.
Jim Turley, “64-Bit CPUs: What you Need to Know”, Extreme Tech, Feb. 8, 2002, pp. 1-26.
Nicholas P. Carter, ECE 412-Advanced Computer Architecture, Lecture 4: Predication, Sep. 13, 2000, pp. 1-17.
August et al., “Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results”, Third International Symposium on High-Performance Computer Architecture, IEEE, Feb. 1-5, 1997, pp. 84-93.
Pnevmatikatos et al., “Guarded Execution and Branch Prediction in Dynamic ILP Processors”, Proceedigns of the 21stAnnual International Symposium on Computer Architecture, IEEE, pp. 120-129.
Mahlke et al., “Characterizing the Impact of Predicated Execution Branch Prediction”, Proceedings of the 27thAnnual International Symposium Microarchitecture, Micro-27, IEEE, Nov. 30-Dec. 2, 1994, pp. 217-227.
D. Grunwald et al., “Confidence Estimation for Speculation Control”, 1998 IEEE, pp. 122-131.
E. Jacobsen et al., “Assigning Confidence Branch Predictions”, 1996 IEEE, pp. 142-152.
S. Manne et al., “Pipeline Gating: Speculation Control for Energy Reduction”, 1998 IEEE, pp. 132-141.
K.C. Tal et al., “Evaluation of a predicate-based software testing strategy”, IBM Systems Journal, vol. 33, No. 3, 1994, pp. 445-457.
S. Mahlke et al., “Effective Compiler Support for Predicated Execution Using the Hyperblock”, 1992 IEEE, pp. 45-54.
Wen-Mei Hwu, “Introduction to Predicated Execution”, Jan. 1998, pp. 49-50.
Gary Scott Tyson, “The Effects of Predicated Execution on Branch Prediction”, ACM, 1994, pp. 196-206.
Grochowski Edward T.
Mulder Hans J.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Treat William M.
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