Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
1998-12-31
2002-03-05
Ellis, Richard L. (Department: 2783)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S226000
Reexamination Certificate
active
06353883
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to computer systems and more particularly to computer system processors that support predication and perform predicate prediction.
BACKGROUND OF THE INVENTION
A processor manipulates and controls the flow of data in a computer system. Increasing the speed of the processor will tend to increase the computational power of the computer. Processor designers employ many different techniques to increase processor speed to create more powerful computers for consumers. One technique for increasing processor speed is called predication.
Predication is the conditional execution of instructions depending on the value of a variable called a predicate. For example, consider the two instructions:
COMPARE
P=a,b
IF (
P
) THEN
c=d+e
The first instruction, COMPARE P=a,b, determines a value for the predicate P. For example, if a is equal to b, then the value of predicate P is “True”, and if a is not equal to b, then the value of predicate P is “False.” “True” and “False” are typically represented in a computer system as single bit values “1” and “0”, respectively (or “0” and “1”, respectively, in a negative logic implementation).
The second instruction, IF (P) THEN c=d+e, includes two parts. The first part, IF (P) THEN, predicates (or conditions) the second part, c=d+e, on the value of predicate P. If P is true ( e.g. a “1”), then the value of c is set equal to the value of d+e. If P is false (e.g. a “0”), then the second part of the instruction is skipped and the processor executes the next sequential instruction in the program code.
Unfortunately, the COMPARE instruction, COMPARE P=a,b, can take a lengthy amount of time to process. Because of this, the execution of subsequent instructions in the program code sequence may be delayed until the COMPARE instruction is resolved.
SUMMARY OF THE INVENTION
A method and apparatus for performing predicate prediction is described. In one method, a predicted predicate value for a predicate is determined. A predicated instruction is then conditionally executed depending on the predicted predicate value.
Other features and advantages of the present invention will be apparent from the accompanying drawings and the detailed description that follows.
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Grochowski Edward T.
Mulder Hans J.
Ellis Richard L.
Intel Corporation
Kaplan David J.
Patel Gautam R.
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