Method and apparatus for performing power management by...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S300000, C713S310000, C713S321000, C713S322000, C713S323000, C713S324000, C712S233000, C712S234000, C712S236000, C712S237000, C712S239000

Reexamination Certificate

active

06282663

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to the field of power management within integrated circuits. More particularly, the present invention relates to a method and apparatus for performing power management by selectively suppressing the speculative execution of instructions to regulate power consumption within a microprocessor.
BACKGROUND OF THE INVENTION
The management of power consumption within microprocessors is becoming increasingly crucial for a number of reasons. As operating frequencies and circuit densities have increased, heat generation within microprocessors has also increased to the extent that thermal considerations are a limiting factor in integrated circuit (IC) design and manufacture. Specifically, the dissipation of heat generated by a microprocessor is a design constraint in both portable and desktop computers. In desktop computers, the dissipation of heat has serious cost implications since a cooling apparatus is typically required to support the microprocessor. In portable computers, in addition to increased costs due to cooling apparatus, the problem of cooling a microprocessor is exacerbated by the space limitations within which such cooling apparatus can be installed. Indeed, the operating frequency of a microprocessor that can be installed within a portable computer may be determined, and limited, by the ability of associated cooling apparatus adequately to cool the microprocessor. Accordingly, the reduction of heat generated by a microprocessor is highly desirable.
Further, the proliferation of portable computers, which must often rely on self-contained batteries for power, has also led to increasing attention being given to reducing power consumption within such portable computers. Power management efforts in the field of portable computing have focused on extending the time a portable computer can operate while drawing power from a charged battery. The minimization of power consumption and heat generation within a microprocessor of a portable computer is also particularly desirable for a number of reasons. Increased battery life results from less power being consumed by both the microprocessor and cooling devices employed in computers to cool the microprocessor, such as fans. Decreased heat generation within the microprocessor also allows processors having higher operating frequencies to be installed in portable computers. Decreased heat generation also allows for a reduction in the size, or even the elimination, of cooling apparatus associated with a microprocessor, thus facilitating more compact portable computers.
Accordingly, there is a need to reduce both the power consumption, and specially the accompanying heat generation, within integrated circuits in general, and within microprocessors in specific.
SUMMARY OF THE INVENTION
According to a first aspect of the invention there is provided a method of reducing power consumption within a processor having branch prediction circuitry. The method requires detecting the occurrence of a trigger event and then suppressing speculative execution of instructions within the processor in response to the detection of the trigger event.
In one embodiment, the operating temperature of the processor is monitored, and the occurrence of the trigger event is detected upon the transcendence of a predetermined thermal threshold by the operating temperature of the processor. In other embodiments, the step of detecting the occurrence of the trigger event may comprise detecting user activation of a suppression signal or detecting the retrieval of a branch instruction, from a memory resource and for processing by the processor, for which a probability of being correctly predicted is less than a predetermined threshold. The probability of the branch instruction being correctly predicted may be determined by a compiler at the time of compilation of the branch instruction, or may require determining whether the branch instruction includes a “data dependent” condition. Alternatively, the probability of the branch instruction being correctly predicted may be determined by examining a branch prediction history for the branch instruction. Suppressing speculative execution of instructions by the processor may entail disabling the branch prediction circuitry.
According to a second aspect of the invention there is provided power management circuitry for reducing power consumption within a processor having a branch prediction capability. The power management circuitry includes a detection circuit configured to detect the occurrence of a trigger event, and a suppression circuit, coupled to the detection circuit, which suppresses speculative execution of an instruction within the processor in response to the detection of a trigger event by the detection circuit.
In one embodiment, the detection circuit detects the transcendence of a predetermined threshold temperature by an operating temperature of the processor, and in another embodiment detects user activation of a suppression signal.
In a further embodiment, the detection circuit may detect the retrieval of a branch instruction, from a memory resource and for processing by the processor, for which a probability of being correctly predicted is less than a predetermined threshold. The suppression circuit operatively disables the branch prediction circuitry.
The invention also provides a microprocessor including power management circuitry as described above.
Other features of the present invention will be apparent from the accompanying drawings and from the detailed description which follows.


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