Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-11-28
2006-11-28
To, Doris H. (Department: 2616)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C712S300000
Reexamination Certificate
active
07143231
ABSTRACT:
A method and apparatus for performing packet classification in a digital signal processor for policy-based packet routing. For one embodiment, the digital signal processor includes a policy statement table for storing policy statements. Each policy statement has associated with it a priority number that indicates the priority of the policy statement relative to other policy statements. The priority numbers are separately stored in a priority index table. The priority index table includes priority logic that determines the most significant priority number from among the policy statements that match an incoming packet during a classification of filter operation. The priority logic also identifies the location in the priority index table of the most significant priority number. The identified location in the priority index table can be used to access associated route information or other information stored in a route memory array. New policy statements can be added at any location in the policy statement table, and the associated priority numbers loaded into corresponding locations in the priority index table. Priority numbers of previously stored priority policy statements may be updated such that the new policy statement does not have the same priority number as the previously stored policy statements.
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Khanna Sandeep
Nataraj Bindiganavale S.
Srinivasan Varadarajan
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Netlogic Microsystems Inc.
Shemwell Mahamedi LLP
To Doris H.
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