Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
Reexamination Certificate
2007-12-20
2010-11-16
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Instruction modification based on condition
Reexamination Certificate
active
07836282
ABSTRACT:
The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for increasing a number of instructions per clock cycle associated with a processor. The illustrative embodiments fold a plurality of non-sequential instructions within the set of sequential order instructions to form a folded instruction. The folded instruction is executed to form an executed instruction. The executed instruction is placed in a reorder buffer. The instructions within the reorder buffer are written to a register based on the sequential order of execution within the set of sequential order instructions.
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Ban Oliver Keren
Keng Neo Hock
Tan Wo Heem
Bennett Steven L.
Chan Eddie P
Faherty Corey
International Business Machines - Corporation
Yee & Associates P.C.
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