Electrical computers and digital data processing systems: input/ – Interrupt processing
Patent
1996-09-12
2000-09-05
Etienne, Ario
Electrical computers and digital data processing systems: input/
Interrupt processing
710 48, G06F 1324
Patent
active
061157759
ABSTRACT:
A time-based and event-based interrupt frequency mitigation scheme is provided. A holdoff event counter is programmed to count a holdoff event count corresponding to a number of interrupts. A holdoff timer is programmed to time a holdoff interval representing the time period to elapse before the generation of an interrupt request to the host system can occur. When a data transfer request associated with the transfer of data from or to the host system is serviced and results in the occurrence of an interrupt event, the holdoff event counter is modified by one. If either the holdoff event counter or the holdoff timer has expired and the interrupt is enabled, an interrupt request to the host system is generated. In response to such interrupt request generation, the interrupt is processed and both the holdoff event counter and the holdoff timer retriggered.
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Cheung Wing
Mizuguchi Shinichi
Roman Peter J.
Ross Theodore L.
Tanaka Koichi
Digital Equipment Corporation
Etienne Ario
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