Method and apparatus for performing incremental placement...

Details Method and apparatus for performing incremental placement... Method and apparatus for performing incremental placement...

2006-08-16

2008-01-08

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07318210

ABSTRACT:
A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes placing new logic elements (LEs) at preferred locations on a layout of an existing system. Illegalities in placement of the new LEs are resolved.

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Togawa et al., “An Incremental Placement and Global Routing Algorithm for Field-Programmable Gate Arrays,” 1998 IEEE Design Automation Conference, pp. 519-526.

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