Method and apparatus for performing incremental compilation...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C703S022000

Reexamination Certificate

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07669157

ABSTRACT:
A method for designing a system on a target device includes merging a netlist for a first partition of the system generated from a bottom-up design flow with a netlist for a second partition of the system from a top-down design flow to form a combined netlist, and performing fitting on the combined netlist.

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