Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
2000-07-25
2003-09-23
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C382S141000
Reexamination Certificate
active
06625512
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for automated error correction of final critical dimensions in semiconductor wafers.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and, therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Among the factors that affect semiconductor device manufacturing are wafer-to-wafer variations that are caused by manufacturing problems that include start-up effects of manufacturing factoring machine tools, memory effects of manufacturing chambers, first-wafer effects, and mismatching of process modules in-manufacturing equipment. One of the process steps that is adversely affected by such factors is the photolithography critical dimension formation. Critical dimension control is one of several important steps in the photolithography area of semiconductor manufacturing. Critical dimension control involves measuring the desired critical circuit feature size compared to the actual circuit feature size on the surface of a semiconductor device. Generally, minimization of misalignment errors is important to ensure that the multiple layers of the semiconductor devices are connected and functional. As technology facilitates smaller critical dimensions for semiconductor devices, the need for the reduction of misalignment errors increases dramatically.
Generally, process engineers currently analyze the process errors a few times a month. The results from the analysis of the process errors are used to make updates to process tool settings manually. Generally, a manufacturing model is employed to control the manufacturing processes. Some of the problems associated with the current methods include the fact that the process tool settings are only updated a few times a month. Furthermore, currently, the process tool updates are generally performed manually. Many times, errors in semiconductor manufacturing are not organized and reported to quality control personnel. Often, the manufacturing models themselves incur bias errors that could compromise manufacturing quality. Proper formation of sub-sections within a semiconductor device is important in proper performance of the manufactured semiconductor device. Critical dimensions of the sub-sections, such as polysilicon gates, generally have to be within a predetermined acceptable margin of error for semiconductor devices to be within acceptable manufacturing quality.
Generally, a set of processing steps is performed on a lot of wafers on a semiconductor manufacturing tool called an exposure tool or a stepper or a scanner, followed by processing of the semiconductor wafers in etch tools. The manufacturing tool communicates with a manufacturing framework or a network of processing modules. The manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which the stepper is connected, thereby facilitating communications between the stepper and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script based upon a manufacturing model, which can be a software program that automatically retrieves the data needed to execute a manufacturing process. Often, semiconductor devices are staged through multiple manufacturing tools for multiple processes, generating data relating to the quality of the processed semiconductor devices. Many times, errors can occur during the processing of semiconductor devices. These errors can cause appreciable inconsistencies in the critical dimensions of multiple parameters in the processed semiconductor devices. Furthermore, it is important to reduce errors to cause the critical dimensions, particularly the final critical dimensions, of the parameters of the processed semiconductor device to be within acceptable tolerance margins.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method is provided for control of final critical dimensions during processing of semiconductor wafers. A manufacturing run of semiconductor devices is processed. Metrology data from the processed semiconductor devices is acquired. A final critical dimension control adjustment process is performed using the acquired metrology data. A feedback/feed-forward modification process is performed in response to the final critical dimension control adjustment process.
In another aspect of the present invention, a system is provided for control of final critical dimensions during processing of semiconductor wafers. The system of the present invention comprises: a metal deposition process tool capable of depositing a metal substance upon a surface of a semiconductor wafer; a photolithography tool capable of defining metal lines upon the surface of the semiconductor wafer; an etch process tool capable of etching excess material resulting from processing of the semiconductor wafer by the photolithography tool; at least one machine interface electronically coupled to each of the metal deposition process tool, the photolithography tool, and the etch process tool, wherein the machine interface is capable of sending at least one control input parameter to each of the metal deposition process tool, the photolithography tool, and the etch process tool; a computer system electronically coupled to the machine interface, the computer system being capable of controlling the machine interface; at least one metrology tool coupled with each of the metal deposition process tool, the photolithography tool, and the etch process tool, the metrology tool being capable of acquiring metrology data; and a final critical dimension control algorithm unit coupled with the metrology tool and the computer system, the final critical dimension control algorithm unit being capable of causing the computer system to modify at least one control input parameter in response to the metrology data.
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International Search Report dated Nov. 7, 2002 for International application No. PCT/US01/22544 Filed Jul. 18, 2001.
Advanced Micro Devices , Inc.
Cabrera Zoilo E.
Picard Leo
Williams Morgan & Amerson P.C.
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