Method and apparatus for performing error-detection and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C714S776000, C714S780000, C714S804000, C714S820000

Reexamination Certificate

active

10966083

ABSTRACT:
One embodiment of the present invention provides a system that facilitates detecting and correcting errors. The system operates by receiving a data packet comprised of p words on a communication pathway, wherein each bit of a word is received on a separate data line in a set of data lines that comprise the communication pathway. The system also receives a time signature t on the communication pathway, wherein t contains per-bit error information for the p words in the data packet. As the data packet is received, the system performs an error-detection operation on each data bit of the data packet in parallel, wherein the error-detection operation generates per-bit error information for each bit position across the p words in the data packet. Finally, the system compares the generated per-bit error-information with the corresponding per-bit error information in the time signature t to determine if there exists an error.

REFERENCES:
patent: 5103451 (1992-04-01), Fossey
patent: 2003/0191835 (2003-10-01), Hauck et al.
patent: 2004/0098660 (2004-05-01), Dong et al.

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