Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-01-22
2000-08-01
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 18, 714 43, 714704, 714749, G06F 1100
Patent
active
060981792
ABSTRACT:
A method and apparatus for performing error detection in a network is disclosed. An error counter is stored in a common memory location accessible by all nodes. The error counter includes separate partitions associated with each node in the network. Each partition includes two error counter values representing, respectively, sending and transmission error counts, for a corresponding node. No global locking mechanism is required to synchronize access to the commonly accessed error counter. Rather, access to the error counter is provided by having code executing on each node adhering to rules regarding the types of access to the various partitions in the error counter. Each node may read from any partition, but may only write to its own partition.
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Baderman Scott T.
Beausoliel, Jr. Robert W.
Digital Equipment Corporation
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