Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-11-14
2006-11-14
Torres, Joseph (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S757000
Reexamination Certificate
active
07137057
ABSTRACT:
An Error Correcting Code (ECC) conversion facility includes a first interface for receiving input data protected in accordance with a first ECC, and first and second processing paths, each connected to the first interface. First and second decoders are incorporated into respective first and second processing paths. Each of these decoders serves to extract clear data from input data protected in accordance with the first ECC. The first processing path also includes a decoder that can protect clear data in accordance with a second ECC. The output of the system is then connected to both the first and second processing paths, and produces output data protected in accordance with the second ECC. A first portion of this output data comprises data received from the first processing path, and a second portion of the output data comprises data received from the second processing path.
REFERENCES:
patent: 5392299 (1995-02-01), Rhines et al.
patent: 5537421 (1996-07-01), Dujari et al.
patent: 5583786 (1996-12-01), Needham
patent: 5949796 (1999-09-01), Kumar
patent: 6029264 (2000-02-01), Kobayashi et al.
patent: 6263466 (2001-07-01), Hinedi et al.
patent: 6320852 (2001-11-01), Obuchi et al.
patent: 6745359 (2004-06-01), Nadeau-Dostie
patent: 6751321 (2004-06-01), Kato et al.
patent: 6886121 (2005-04-01), Dervisoglu et al.
patent: 6901546 (2005-05-01), Chu et al.
patent: 2004/0133831 (2004-07-01), Williams et al.
patent: 2004/0133832 (2004-07-01), Williams et al.
patent: 01/25924 (2001-04-01), None
Stephen B. Wicker, Error Control Systems for Digital Communications, Prentice-Hall, 1996, pp. 116-121.
Anshuman Chandra, “System-on-a-Chip Test-Data Compression and Decompression Architectures Based on Golomb Codes,” IEEE, 2001, pp. 355-368.
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Sun Microsystems Inc.
Torres Joseph
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